Chinese technology company Huawei announced its new chip design strategy, which focuses on “advanced packaging” and increasing in-system data speed rather than shrinking transistors in order to overcome the restrictions imposed by US sanctions.
The speech given by He Tingbo, President of Huawei Semiconductor Division, at the 2026 IEEE International Circuits and Systems Symposium (ISCAS) was published on the company’s website.
Stating that Moore’s Law, which has guided the industry for 50 years, is based on physical limits, He explained the company’s new chip design strategy, which focuses on “advanced packaging” and increasing in-system data speed rather than miniaturizing transistors.
He emphasized that they introduced time scaling instead of traditional geometric scaling, and explained that they increased the chip layout from a single layer to two layers with their newly developed “LogicFolding” engineering approach.
Huawei Semiconductor Department President He Tingbo stated that thanks to this structure, the interaction points between transistors will increase and power efficiency will increase, and that despite the restrictions, they will be globally competitive in the next 10 years.
With its new strategy, the company aims to design high-performance chips with transistor density equivalent to 1.4 nanometer process by 2031.
New technology is critical for China’s artificial intelligence moves and the smartphone market. The “Ascend” series, which powers domestic artificial intelligence models such as DeepSeek V4, and the new “Kirin” processors in the flagship “Mate 90” smartphones, which will be released in the fall of 2026, will use this architecture. Huawei reported that it has produced 381 chips for different industries using this method in the last six years.
Market analysts state that this move by Huawei will increase the competitive pressure on Apple and Nvidia in the Chinese market.
